Critical dimension control is important in integrated circuit manufacturing processes, particularly during photolithography processes. Controlling critical dimensions is becoming increasingly important as line widths of resist patterns fall within the deep sub-micron range. Various processing parameters, such as the amount of exposure to light, developing time and pre-exposure and post-exposure baking temperatures effect critical dimensions. Therefore, accurate monitoring of these process parameters and critical dimensions are also important.
Presently, critical dimensions are determined by actually measuring line width of the resist pattern for sample wafers. The measurements are typically taken by cross-section scanning electron beam (SEM) metrology. This method, however, is both destructive and slow, eliminating its use for in-situ process monitoring.
As mentioned, one parameter that effects critical dimension is baking temperature, including both pre-exposure and post-exposure baking temperature. Presently, hot plate temperature is monitored using a plurality of sensors mounted on the backside of the testing wafer during a maintenance test. This technique suffers from several drawbacks. First, the technique is not used to monitor temperature during actual process runs. Therefore, no real time correction can be implemented using the test run temperature data. Also, the sensors measure temperature at the bottom surface of the wafer proximate to the hot plate, but not at the actual photoresist layer. It may be that the sensors indicate a uniform temperature distribution across the hot plate, but the temperature at the photoresist layer is not necessarily uniform, and vice versa. The measured temperature is not necessarily the temperature realized by the photoresist layer above the monitored regions because it does not account for the conductance of the various layers that separate the photoresist from the silicon substrate.
Therefore, there still remains a need for a non-destructive method of determining temperature at localized regions of a photoresist layer during processing and a method of utilizing this information to control critical dimensions.